Processor Utilization Bounds

For

Real-Time Systems With Precedence Constraints

A real-time system is a system that guarantees a certain capability within a specified time constraint. In developing such systems, one of the critical steps is to predict whether a particular implementation satisfies all timing requirements. The success of a system level design exploration tool is largely dependent on the ability to rapidly estimate the timing performance of many candidate implementations. Tight processor utilization bounds can be used effectively for such rapid performance estimation. Good processor utilization bounds have been proposed for periodic task systems containing only independent tasks. We present a novel approach to computing tight utilization bounds for systems, multiple processors system as well as single processor system, consisting of periodic tasks with precedence constraints.

By carefully analyzing the relationships among tasks, we formulate the problem of determining the tightest upper bound as a set of linear programming (LP) problems. Furthermore, we have made a number of observations to reduce the number of LP problem instances required to be solved, which greatly improves the time needed to determine the utilization bounds. Our LP model allows additional constraints to be included to capture some known characteristics of the system (e.g., the relative sizes of task execution times). Adding such constraints judiciously can significantly improve the quality of the bounds. However, care must be taken when adding such constraints in order to guarantee the bounds to be valid. We present guidelines based on linear algebra principles to help the designer determine the right combination of constraints to add.

For a given system specification, the processor utilization bound can be computed by our approach independent of the implementation (such as choices of processors). Then, the bound can be used in the design exploration process to rapidly determine if an implementation of the system satisfies the timing constraints. The effectiveness of our approach is demonstrated through a number of experimental results in our published literatures.

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Flow chart of using Processor Utilization Bounds in design exploration process

System Specification

Directed Acyclic Graphs (DAG) are used to represent tasks consisting of subtasks, where each task is a connected DAG and vertices in the DAG represent the subtasks while the edges represent the precedence constraints among them. See the following figure for example.

system
The task graph representation of a periodic task system containing four tasks

The tasks are denoted by \Tau_1, \Tau_2, ... ... \Tau_N, and the subtasks of \Tau_i are denoted by \tau_{i,1}, \tau_{i,2}, ... ... \tau_{i,m_i}, where m_i is the total number of subtasks in task \Tau_i. Let N and M be the total number of tasks and total number of subtasks, respectively. Given that the tasks must be executed periodically, we refer to the kth instance of task i as the kth job of task i. Each task or subtask is associated with the following timing parameters:

Processor Utilization Bound Approach

Processor utilization bound approach has been widely used for systems with independent tasks. However, problem exists when applying the bound approach to tasks with precedence constraints. The following figure is a simple example system with two tasks. Even though \tau_q2 has higher priority than \tau_n1, \tau_n1 still gets to be scheduled ahead of \tau_q2 when jobs of task one and two are released at the same time. This is because \tau_q2's predecessor has lower priority than \tau_n1 and it cannot be scheduled until its predecessor finishes execution. Thus the rule that "whoever has higher priority gets to go first" doesn't apply under this type of circumustances.

8
A simple example system with two tasks

Given a set of periodic tasks each of which consists of subtasks modeled by a DAG, the subtasks in each DAG can be converted to a one-dimensional list by topological ordering where ties are broken according to the subtask priority assignment. The resulting sequential list has exactly the same execution schedule as the original DAG-based model when scheduled on a single processor. The subtasks of a task are divided and grouped in to three type of subtask sets relative to a particular task \Tau_n:
1
Task \Tau_i with both single-preemption task set and multiple blocking task sets for \Tau_n


Publications:

1. Hongchao (Stephanie) Liu and Xiaobo Sharon Hu, "Efficient performance estimation for general real-time task systems", IEEE/ACM International Conference on Computer Aided Design (ICCAD'01), p464-470, November,
2001.
2. Hongchao (Stephanie) Liu and Xiaobo Sharon Hu, "Processor utilization bounds for real-time systems with precedence constraints", Design Automation for Embedded Systems, An International Journal, v7, p89-114, September, 2002.